In general, there are two methods for testing nonvolatile memories embedded in micro control systems. One involves testing nonvolatile memories using a parallel interface, and the other involves testing nonvolatile memories using a serial interface.
When testing nonvolatile memories using a parallel interface, an independent memory chip of a nonvolatile memory can be controlled employing addresses, data and control signals. However, due to many connection signals, such control systems have been difficult to design. In addition, because many channels are used when testing products, there is a limit as to how many chips can be tested simultaneously. Furthermore, as memory size increases, additional address pins are required.
When testing nonvolatile memories using a serial interface, additional pins do not have to be added because the size of internal serial buffers can be controlled even when memory size varies. An example of an apparatus for testing nonvolatile memories employing a serial interface and method thereof are disclosed in Korean Laid-Open Publication No. 2002-0080907.
FIG. 1 shows a micro control system having a conventional memory controller. Referring to FIG. 1, the micro control system having the conventional memory controller comprises a nonvolatile memory 10 and a memory controller 20. The nonvolatile memory 10 includes a row and column decoder block (X-DEC & Y-DEC) 12, an electronically erasable programmable read only memory (EEPROM) cell array 14, a high-voltage generator 16 and a write buffer 18. The memory controller 20 includes control logic 21, a data register 22 and an address register 23. A clock SCLK and serial data SDAT are inputted through a clock pin 32 and a data pin 31 from an external test system (not shown).
FIG. 2 is a timing diagram illustrating a method of programming the nonvolatile memory 10 of the micro control system in FIG. 1 using a serial interface mode. The clock SCLK and the serial data SDAT are inputted through the clock pin 32 and the data pin 31. The serial data SDAT has a command, address and program data. FIG. 2 shows that the time required to program one data bit is 30.
The time, however, for programming data is controlled by counting a clock applied from the outside in a conventional programming method. Therefore, when a cycle of an external clock is changed, a program time is also changed. In addition, because various products have different program and erase times according to certain processes, applying the external clock in certain products may result in the cycle of the external clock being out of synch with programming/erasing methods.